02910nam a2200301 a 4500 1/44942 140721s2003 us 000 0 eng 9781558608528 1558608524 47899 OPELS eng OPELS OPELS OCLCQ OCLCF GR-PeUP Duato, Jose. Interconnection networks [electronic resource] : an engineering approach / Josβe Duato, Sudhakar Yalamanchili, Lionel Ni. Rev. print. San Francisco, CA : Morgan Kaufmann, c2003. 1 online resource (xxiii, 600 p.) : ill. The performance of most digital systems today is limited by their communication or interconnection, not by their logic or memory. As designers strive to make more efficient use of scarce interconnection bandwidth, interconnection networks are emerging as a nearly universal solution to the system-level communication problems for modern digital systems. Interconnection networks have become pervasive in their traditional application as processor-memory and processor-processor interconnect. Point-to-point interconnection networks have replaced buses in an ever widening range of applications that include on-chip interconnect, switches and routers, and I/O systems. In this book, the authors present in a structured way the basic underlying concepts of most interconnection networks and provide representative solutions that have been implemented in the industry or proposed in the research literature. * Gives a coherent, comprehensive treatment of the entire field * Presents a formal statement of the basic concepts, alternative design choices, and design trade-offs * Provides thorough classifications, clear descriptions, accurate definitions, and unified views to structure the knowledge on interconnection networks * Focuses on issues critical to designers. Foreword -- Foreword to the First Printing -- Preface -- Chapter 1 -- Introduction -- Chapter 2 -- Message Switching Layer -- Chapter 3 -- Deadlock, Livelock, and Starvation -- Chapter 4 -- Routing Algorithms -- Chapter 5 -- CollectiveCommunicationSupport -- Chapter 6 -- Fault-Tolerant Routing -- Chapter 7 -- Network Architectures -- Chapter 8 -- Messaging Layer Software -- Chapter 9 -- Performance Evaluation -- Appendix A -- Formal Definitions for Deadlock Avoidance -- Appendix B -- Acronyms -- References -- Index. Includes bibliographical references (p. 569-592) and index. Computer network. Multiprocessors. Electronic books. Yalamanchili, Sudhakar. Ni, Lionel M. INST UNIPILB EBOOKS 20140721 00b47899 00b47899 ONLINE 0 ScienceDirect http://www.sciencedirect.com/science/book/9781558608528 /webopac/covers/03/47899_9781558608528.jpg /webopac/covers/03/47899_1558608524.jpg